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[Fundamentals · 04]

Bitrates and bus types: from single-wire CAN to high-speed networks

A CAN bit rate is not a free setting. It is a contract between every node on a segment, defined down to the moment inside each bit at which the voltage is sampled, and it decides how long the bus may be, which transceivers fit and how the network behaves under fault. Here is that contract in detail, together with the physical layers it runs on.

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13 min
Updated
7. Oktober 2026
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The bit rates you will meet

ISO 11898 allows any bit rate up to 1 Mbit/s for classical CAN, but practice has converged on a short list. Each value has a history and a typical home:

Table 01Common CAN bit rates
Bit rateBit timeTypical useReference
33.3 kbit/s30 µsSingle-wire body networksSAE J2411
83.3 kbit/s12 µsSingle-wire high-speed mode; some body and comfort networksSAE J2411, manufacturer specifications
125 kbit/s8 µsLow-speed fault-tolerant comfort networks; truck–trailer linksISO 11898-3, ISO 11992-1
250 kbit/s4 µsTrucks, buses, agricultural and construction machinery; marine networks; legislated OBD optionSAE J1939-11/-15, ISO 11783-2, NMEA 2000, ISO 15765-4
500 kbit/s2 µsPassenger-car powertrain, chassis and diagnostics; newer heavy-duty networks; usual CAN FD nominal rateISO 15765-4, SAE J2284-3, SAE J1939-14
1 Mbit/s1 µsIndustrial automation and short high-performance networks; rare in road vehiclesISO 11898-2, CANopen

Above these sit the CAN FD data-phase rates, typically 2, 5 or 8 Mbit/s, which apply only between the bit-rate switch and the CRC delimiter of an FD frame; see Classic CAN vs CAN FD. The arbitration part of every FD frame still runs at a nominal rate from the table, most often 500 kbit/s.

Inside one bit: time quanta and segments

A CAN controller does not sample a bit at an arbitrary moment. It divides the nominal bit time into time quanta (tq), each a whole number of CAN clock periods, and groups them into four segments:

Table 02Segments of a classical CAN bit (ISO 11898-1)
SegmentLengthPurpose
Sync_Seg1 tqWhere edges are expected; the reference for synchronisation
Prop_Seg1–8 tqCompensates physical delays: the signal's round trip on the bus plus transceiver and controller delays
Phase_Seg11–8 tqAbsorbs phase errors; may be lengthened by resynchronisation
Phase_Seg22–8 tqAbsorbs phase errors; may be shortened by resynchronisation; covers the controller's processing time

The complete bit must contain 8 to 25 time quanta. The sample point sits at the boundary between Phase_Seg1 and Phase_Seg2 and is usually quoted as a percentage of the bit time:

Formula
Sample point = (1 + Prop_Seg + Phase_Seg1) / (1 + Prop_Seg + Phase_Seg1 + Phase_Seg2) × 100 %
The moment inside each bit at which the controller decides between dominant and recessive.
Formula
t_q = BRP / f_CAN · bit rate = 1 / (N × t_q)
BRP is the bit-rate prescaler, f_CAN the CAN clock frequency and N the number of time quanta per bit.

Choosing the sample point

A late sample point gives the signal the most time to cross the bus and settle, which favours long networks. An earlier one leaves more room in Phase_Seg2 for clock tolerance and resynchronisation, which favours robustness. CANopen recommends 87.5 %, with roughly 85 to 90 % tolerated between nodes. CAN in Automation's CiA 601-3 advises against nominal sample points later than 80 % in automotive CAN FD networks. Vehicle manufacturers fix exact values for every network in their own specifications.

What matters most is consistency. Every node on a segment must sample at nearly the same point. A node that samples much earlier or later than the others still works on a quiet bench and fails on a long harness, or only when it happens to be the one transmitting.

Synchronisation: staying aligned without a clock wire

CAN carries no clock line, and every node runs from its own oscillator. Two mechanisms keep them aligned:

  • Hard synchronisation at the start of frame: every receiver restarts its bit timing on the recessive-to-dominant edge of SOF, so all nodes begin each frame aligned to the transmitter.
  • Resynchronisation during the frame: whenever a recessive-to-dominant edge arrives outside Sync_Seg, the controller lengthens Phase_Seg1 or shortens Phase_Seg2 by up to the synchronisation jump width (SJW), which in classical CAN is between 1 and 4 tq and never larger than Phase_Seg1.

Resynchronisation needs edges, and bit stuffing supplies them: no more than 10 bits can pass between two recessive-to-dominant edges in a valid frame. That bound becomes a requirement on oscillator accuracy, expressed by two classic conditions:

Formula
Δf ≤ min(Phase_Seg1, Phase_Seg2) / (2 × (13 × N − Phase_Seg2)) and Δf ≤ SJW / (20 × N)
Maximum oscillator tolerance, with all segments and N in time quanta. The first condition protects error-flag handling, the second normal resynchronisation.

Quartz crystals, whose tolerance is in the tens of parts per million, rarely come close to these limits on classical CAN. The limits start to bite with ceramic resonators, which are far less accurate, and in CAN FD data phases, where every timing error is measured against a much shorter bit.

Worked example: 500 kbit/s from a 40 MHz clock

A controller with a 40 MHz CAN clock, one of the frequencies CAN in Automation recommends for new designs, has to run a 500 kbit/s bus with a 2 µs bit time. Two valid configurations:

Table 03Two bit-timing configurations for 500 kbit/s at 40 MHz
ParameterOption AOption B
Prescaler (BRP)54
Time quantum125 ns100 ns
Time quanta per bit (N)1620
Sync / Prop / Phase1 / Phase21 / 7 / 6 / 21 / 8 / 7 / 4
Sample point87.5 %80.0 %
SJW24
Oscillator tolerance, condition 10.49 %0.78 %
Oscillator tolerance, condition 20.63 %1.00 %
  1. 01
    Fix the time quantum

    Divide the 2 µs bit time by a chosen N and check that the result is a whole number of 25 ns clock periods. N = 16 gives 125 ns (BRP 5); N = 20 gives 100 ns (BRP 4).

  2. 02
    Place the sample point

    Choose Phase_Seg2 to put the sample point where the network specification requires it: 2 tq out of 16 for 87.5 %, 4 out of 20 for 80 %.

  3. 03
    Split the remainder

    Divide the remaining quanta between Prop_Seg and Phase_Seg1, each within its 1–8 tq limit.

  4. 04
    Set the SJW

    Use the largest permitted value, up to the smaller of 4 and the two phase segments, to maximise tolerance.

  5. 05
    Check the tolerance

    Option A tolerates about 0.49 % of oscillator error and option B about 0.78 %, both far beyond a crystal's error. Option A buys a later sample point; option B buys margin.

Neither option is right in isolation. The correct one is whichever matches the sample point of every other node on the network, which is why bit-timing parameters belong in the network specification rather than in individual ECU designs.

Bus length versus bit rate

During arbitration, a transmitter must see the bus level that results from every other node's bit before it samples its own. The signal has to reach the farthest node and come back, through two transceivers and the cable, within the part of the bit before the sample point. With a line delay of about 5 ns/m, a 40 m bus at 1 Mbit/s spends 400 ns, 40 % of the bit time, on the cable round trip alone, before any transceiver or controller delay is counted. That arithmetic is why the maximum length falls as the bit rate rises:

Table 04Commonly cited maximum bus lengths for classical CAN (linear bus, good cable, typical transceivers)
Bit rateApproximate maximum length
1 Mbit/s25–40 m
500 kbit/s100 m
250 kbit/s250 m
125 kbit/s500 m
50 kbit/s1,000 m

Road vehicles rarely approach these figures. A passenger car's networks span a few metres to a few tens of metres, and SAE J1939 limits a heavy-duty backbone to 40 m. In vehicles the binding constraints are usually stub length, topology and EMC, described in CAN physical layer, rather than raw length.

Fig. 01Interactive
120 Ω120 ΩECU 1ECU 3ECU 5ECU 2OBDECU 6Stub← Trunk →

One trunk, a terminator at each physical end and short stubs to every control unit.

Fig. 01Bus length is measured along the backbone between the two terminators; stub lengths and node spacing add their own limits as the bit rate rises.

Three physical layers, one protocol

The same CAN protocol runs over three standardised physical layers in road vehicles, plus a dedicated variant for truck–trailer links. They differ in voltages, wiring and termination and, crucially, in what happens when a wire fails.

Table 05High-speed, low-speed fault-tolerant and single-wire CAN compared
PropertyHigh-speed CANLow-speed fault-tolerant CANSingle-wire CAN
StandardISO 11898-2ISO 11898-3SAE J2411
Bit rateUp to 1 Mbit/s; faster CAN FD data phaseAbove 40 up to 125 kbit/s33.3 kbit/s; 83.3 kbit/s high-speed mode
WiringTwisted pairTwisted pairOne wire plus ground
Recessive levelCAN-H ≈ 2.5 V, CAN-L ≈ 2.5 VCAN-H ≈ 0 V, CAN-L ≈ 5 V≈ 0 V
Dominant levelCAN-H ≈ 3.5 V, CAN-L ≈ 1.5 VCAN-H ≈ 3.6 V, CAN-L ≈ 1.4 V≈ 4–5 V; ≈ 10–12 V for wake-up
Termination120 Ω at each end of the busResistors in every node, about 100 Ω in total per lineLoad resistor in every node
After a single wire faultCommunication usually stopsContinues in single-wire modeNot applicable: a single conductor
Typical usePowertrain, chassis, diagnostics, J1939Comfort and body electronics, mostly older platformsLow-cost body networks, mostly older platforms

High-speed CAN (ISO 11898-2)

The dominant physical layer in every vehicle class today. Its strengths are speed and simplicity: two wires, two terminators and an inexpensive transceiver. Its weakness is fault tolerance. A short between the lines, and most shorts to ground or battery, stop communication on the segment, so manufacturers split functions across several networks joined by gateways and one fault never takes down the whole vehicle. Every CAN FD network uses this physical layer.

Low-speed fault-tolerant CAN (ISO 11898-3)

Designed for comfort electronics whose wiring runs through doors, seats and mirrors and is exposed to chafing and crushing. In the recessive state, termination resistors in each node pull CAN-H towards ground and CAN-L towards the 5 V supply; a dominant bit drives them to about 3.6 V and 1.4 V. The transceiver monitors both lines continuously. If one wire breaks or shorts to ground or battery, or the two lines short together, it switches to single-wire transmission and reception on the healthy line and returns to differential mode once the fault clears. All nodes keep communicating, with reduced noise immunity.

The price is a ceiling of 125 kbit/s and a different termination scheme: each node carries its own resistors, typically from 500 Ω to several kilo-ohms, sized so that the network totals about 100 Ω per line. The familiar 60 Ω reading across CAN-H and CAN-L means nothing on this bus. Low-speed fault-tolerant CAN was widespread on comfort networks and has largely given way to high-speed CAN and LIN on newer platforms.

Single-wire CAN (SAE J2411)

The minimum-cost option: one signal wire referenced to ground. Normal communication runs at 33.3 kbit/s with dominant levels of about 4 to 5 V. A raised dominant level of about 10 to 12 V acts as a wake-up broadcast for sleeping nodes, and a high-speed mode at 83.3 kbit/s serves diagnostics and reprogramming. Without a differential pair, emissions and immunity depend on slow, shaped edges, which is why the bit rate stays low. Single-wire CAN is most closely associated with General Motors' GMLAN body networks, where up to 32 nodes share the line.

Truck–trailer CAN (ISO 11992-1)

Commercial-vehicle combinations add one more variant. ISO 11992-1 defines a point-to-point CAN link between towing vehicle and trailer at 125 kbit/s for 12 V and 24 V systems, which keeps communicating on one wire if the other is interrupted. Brake and running-gear data travel over it through the ISO 7638 connector, with the messages defined in ISO 11992-2, and other equipment in ISO 11992-3. Because the link is strictly point-to-point, each trailer in a combination has its own link to the vehicle in front.

Why a bit-rate mismatch is never harmless

A node configured for the wrong bit rate does not simply fail to understand the traffic. Its controller sees stuff, form and CRC errors in almost every frame and, if it is allowed to transmit, answers each one with an active error flag. Those flags destroy valid frames for every other node on the bus. Transmitters retry, error counters climb, and the vehicle's ECUs start storing communication faults; on a busy bus, warning lamps can appear within seconds.

The same applies, more subtly, to the correct bit rate with an incompatible sample point or synchronisation setting: the node works most of the time and corrupts frames only with particular bit patterns or at particular temperatures. That is why the full bit timing, not just the headline rate, has to match the network specification.

Verifying bit rate and timing on an oscilloscope

An oscilloscope confirms that a bus runs at its documented rate and that its bits are clean. Because stuffing limits runs of identical bits to five inside a frame, the narrowest pulse in any frame is exactly one bit time:

Table 06Bit widths to expect
Bit rateNarrowest pulse (one bit)Longest run in the stuffed part of a frame
33.3 kbit/s30 µs150 µs
83.3 kbit/s12 µs60 µs
125 kbit/s8 µs40 µs
250 kbit/s4 µs20 µs
500 kbit/s2 µs10 µs
1 Mbit/s1 µs5 µs
2 Mbit/s (CAN FD data phase)500 ns2.5 µs
5 Mbit/s (CAN FD data phase)200 ns1 µs
  1. 01
    Probe

    Connect CAN-H and CAN-L to two channels referenced to chassis ground, or use a differential probe. Set the time base to show a whole frame, about 500 µs across the screen at 500 kbit/s.

  2. 02
    Measure the narrowest pulse

    Place the cursors on the shortest dominant or recessive pulse. Its width is the bit time; compare it with the documented rate.

  3. 03
    Check the edges

    Rising and falling edges should be clean and mirrored, and any ringing should have died away well before the sample point late in the bit.

  4. 04
    Look for error flags

    Runs of six or more dominant bits mean that a node is signalling errors. A burst of them straight after a new device is connected points directly at that device's configuration.

  5. 05
    Check the FD data phase

    On CAN FD, zoom into the data phase: the bits narrow after the BRS bit and widen again at the CRC delimiter. Data-phase edges are the most sensitive indicator of stub and topology problems.

Fig. 02Interactive
CH1 · CAN-H · 1 V/divCH2 · CAN-L · 1 V/div2 µs/div0 V

CAN-H rises and CAN-L falls by the same amount around 2.5 V. Edges are sharp and the recessive level is flat.

Fig. 02Oscilloscope patterns on a high-speed CAN bus: clean, mirrored edges on a correctly terminated bus, the slow and ringing edges of a missing terminator, and two wiring faults.

A CAN FD data phase at 5 Mbit/s needs real bandwidth from the instrument: at least 100 MHz and several hundred megasamples per second, so that you see actual edges and ringing rather than a rounded approximation. Further patterns are collected in Field diagnostics.

Frequently asked questions

Why is 500 kbit/s so common in cars?

It balances bandwidth against cost: it fits passenger-car network lengths and EMC limits with inexpensive transceivers and unshielded cable. Legislated OBD on CAN under ISO 15765-4 allows it alongside 250 kbit/s, and CAN FD kept it as the usual nominal rate.

Is there a difference between bit rate and baud rate on CAN?

On CAN the two numbers are the same, because each symbol carries one bit; ISO 11898 uses the term bit rate. Remember that stuff bits and protocol overhead travel at that rate too, so the useful data rate is always lower.

Can a vehicle network run at 1 Mbit/s?

Technically yes on a short network, but production vehicles almost never do. When more bandwidth is needed, manufacturers move to CAN FD, which keeps a 500 kbit/s arbitration phase and accelerates only the data phase.

Is 83.3 kbit/s a CAN FD rate?

No. It is a classical CAN rate, used by single-wire CAN's high-speed mode and by some body networks. It has nothing to do with CAN FD.

Can high-speed and low-speed CAN share a wire pair?

No. Their voltage levels and termination schemes are incompatible. They are separate networks, joined by a gateway where data has to cross between them.

End of articleUpdated 7. Oktober 2026
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